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Memory Issues For AI Edge Chips

“But fitting millions of weights in a standalone digital edge processor using SRAM is very expensive, irrespective of the technology,” said Vineet Kumar Agrawal, design director of the IP Business unit at Cypress. “Getting data from a DRAM is 500X more expensive than getting it from an internal SRAM.”

DRAM is 500x more energy consuming than SRAM
While SRAM is more expensive in terms of dollars for bytes

march 2020 Memory Issues For AI Edge Chips

  • Use conventional memories like SRAM and others.
  • Use NOR flash for a newer technology called analog in-memory computing.
  • Utilize phase-change memory, MRAM, ReRAM and other next-generation memories, which are being explored for AI edge chips.

Dozens of AI edge chip vendors also have emerged, such as Ambient, BrainChip, GreenWaves, Flex Logix, Mythic, Syntiant and others. In total, 1.6 billion edge devices are expected to ship with deep-learning accelerators by 2024, according to the firm.

AI edge chips also run machine learning algorithms using 8-bit computations....

Using SRAM-based memory, Syntiant classifies its architecture as near-memory computing. The idea behind the chip is to make voice as the main interface in systems. Amazon’s Alexa is one example of an always-on voice interface.

Analog-in-memory promises to reduce power. But not all NOR is alike. For example, some NOR technologies are based on a floating-gate architecture.

Using a NOR-based floating-gate approach, Microchip has developed an analog in-memory computing architecture for machine learning. The technology integrates a multiply-accumulate (MAC) processing engine.

There are other NOR options. For example, Cypress for some time has been offering a different embedded NOR flash technology called SONOS.

STT-MRAM is ideal for embedded applications, where it’s targeted to replace NOR at 22nm and beyond. “If you look at the new memories, MRAM is the best for low-density, something less than one gigabit

MRAM, however, can support only two levels, so it is not suitable for in-memory computing, according to some experts
However, it is possible to make compute cells where the weight is stored using multiple memory devices

  • Conclusion

It’s still unclear which current or future next-generation memory technology is the winner

There are already signs of a shakeout, where larger companies are beginning to buy the startups. As with any new chip segment, some will succeed, some will be acquired, and others will fail.

https://semiengineering.com/knowledge_centers/artificial-intelligence/

The backbone of computing architecture for 75 years is being supplanted by more efficient, less general compute architectures

Mixed-signal solutions are a strong candidate

For example, with an AI accelerator that processes layer-by-layer, it is possible to anticipate what memory contents will be required ahead of time. “While layer N is being processed, the weights for layer N+1 are brought in from DRAM, in the background, during computation of layer N,” explains Geoff Tate, CEO of Flex Logix